HY5DU56422AT - (HY5DU56xx22A(L)T) 256M-S DDR SDRAM

This page provides the datasheet information for the HY5DU56422AT, a member of the HY5DU561622AT (HY5DU56xx22A(L)T) 256M-S DDR SDRAM family.

Product Overview

Hynix Semiconductor

Part number	HY5DU56422AT
Manufacturer	Hynix Semiconductor
File Size	529.85 KB
Description	(HY5DU56xx22A(L)T) 256M-S DDR SDRAM
Datasheet	HY5DU56422AT Datasheet
Additional preview pages of the HY5DU56422AT datasheet.

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VDD, VDDQ = 2.5V +/- 0.2V All inputs and outputs are compatible with SSTL_2 interface Fully differential clock inputs (CK, /CK) operation Double data rate interface Source synchronous - data transaction aligned to bidirectional data strobe (DQS).
All addresses and control inputs except data, data strobes and data masks latched on the rising edges of the clock Programmable CAS latency 1.5, 2, 2.5 an.

Other Datasheets by Hynix Semiconductor

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HY5DU56422CF - (HY5DU56xxxC(L)F) 256M DDR SDRAM
HY5DU56422CT - (HY5DU56xx22CT) 256M-P DDR SDRAM
HY5DU56422DT - (HY5DU56xx22DT) 256Mb DDR SDRAM
HY5DU56422DTP - (HY5DU56x22DTP) 256M DDR SDRAM
HY5DU56422LT - (HY5DU56xx22A(L)T) 256M-S DDR SDRAM
HY5DU56422LT - (HY5DU56xx22DT) 256Mb DDR SDRAM

Published: Oct 10, 2006 |