HMP112F7EFR8C-S5 - 240pin Fully Buffered DDR2 SDRAM DIMMs

This page provides the datasheet information for the HMP112F7EFR8C-S5, a member of the HMP112F7EFR8C-Y5N3 240pin Fully Buffered DDR2 SDRAM DIMMs family.

Product Overview

Hynix

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Datasheet Details

Part number	HMP112F7EFR8C-S5
Manufacturer	Hynix
File Size	1.08 MB
Description	240pin Fully Buffered DDR2 SDRAM DIMMs
Datasheet	HMP112F7EFR8C-S5 Datasheet
Additional preview pages of the HMP112F7EFR8C-S5 datasheet.

HMP112F7EFR8C-S5 Product details

Description

and is subject to change without notice.

Hynix Electronics does not assume any responsibility for use of circuits described.

No patent licenses are implied.

Features

novel architecture including the Advanced Memory Buffer that isolates the DDR2 SDRAMs from the channel. This single component located in the front side center of each DIMM, acts as a repeater and buffer for all signals and commands which are exchanged between the host controller and the DDR2 SDRAMs including data in and output. The AMB communicates with the host controller and adjacent DIMMs on a system board using an industry standard Differential Point to Point Link Interface at 1.5V power. Th.

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Other Datasheets by Hynix

HMP112F7EFR8C-S6D3 - 240pin Fully Buffered DDR2 SDRAM DIMMs
HMP112F7EFR8C-S6D5 - 240pin Fully Buffered DDR2 SDRAM DIMMs
HMP112F7EFR8C-Y5 - 240pin Fully Buffered DDR2 SDRAM DIMMs
HMP112F7EFR8C-Y5N3 - 240pin Fully Buffered DDR2 SDRAM DIMMs
HMP112S6EFR6C-C4 - 200pin Unbuffered DDR2 SDRAM SO-DIMMs
HMP112S6EFR6C-S5 - 200pin Unbuffered DDR2 SDRAM SO-DIMMs
HMP112S6EFR6C-S6 - 200pin Unbuffered DDR2 SDRAM SO-DIMMs
HMP112S6EFR6C-Y5 - 200pin Unbuffered DDR2 SDRAM SO-DIMMs

Published: Dec 12, 2013 |