IP00C721 Datasheet | I-Chips

Description The IP00C721 is a low-cost device for real-time image resizing and frame rate conversion up to Wide-XGA resolution output. It features a 4x4 pixel interpolation core, with higher sub-pixel resolution than previous devices. The IP00C721 has 2 image input ports: 1) digital RGB 24 bits up to 108 MHz, and 2) digital YUV up to 80 MHz. The output image port can be either 24 bits or 30 bits with a maximum speed of 80 mpixels/sec, and can be driven by an internal or external pixel clock. Lower bit resolutions are also supported for 18-bit display devices. The input and output image ports are pletely independent to allow simultaneous image scaling and frame rate conversion. The IP00C721 has an embedded image memory controller for direct interface to an external SDRAM device. The IP00C721 is ideally suited for applications such as projectors and low-cost display systems. w w w .d e e h s a t a m o c Tools Support . u 4 t - Evaluation Board - Local Technical Support .. IP00C721 Features Input Image Formats - RGB 24-bit up to 108 MHz - YUV4:2:2 16-bit & YUV4:4:4 24-bit up to 80 MHz - Image size up to 2400 pixels horizontally with 1438 active pixels - External synchronization (H Sync., V Sync., Clock) - Interlaced and progressive scan supported External Memory - SDRAM (SGRAM) with 32-bit memory bus interface - Can operate with a single memory device - 110 MHz maximum memory clock Other Features - - - - - - - - - YUV-to-RGB conversion with 6 coefficients 16-color OSD overlay Color dithering for 24-bit or 18-bit output Edge Enhancement Gamma Correction LUT (8-bit in, 10-bit out) Brightness and Contrast adjustments Measurement of input signal characteristics Keystone correction LVTTL-patible inputs and outputs Output Image Formats - RGB (30)24-bit up to 80 MHz - Image size up to 2048 pixels horizontally with 1438 active pixels - External or internal synchronization modes Scaling - - - - 4x4 pixels programmable interpolation Precision up to 1/64th of a...