ICS557-01 Datasheet | ICST

.. PCI-EXPRESS CLOCK SOURCE Description The ICS557-01 is a clock chip designed for use in PCI-Express Cards as a clock source. It provides a pair of differential outputs at 100 MHz in a small 8-pin SOIC package. Using ICS’ patented Phase-Locked Loop (PLL) techniques, the device takes a 25 MHz crystal input and produces HCSL (Host Clock Signal Level) differential outputs at 100 MHz clock frequency. LVDS signal levels can also be supported via an alternative termination scheme. Features - Supports PCI-Express TM HCSL Outputs 0.7 V current mode differential pair - - - - - - - - - Supports LVDS Output Levels Packaged in 8-pin SOIC Available in Pb (lead) free package Operating voltage of 3.3 V Low power consumption Input frequency of 25 MHz Short term jitter 100 ps (peak-to-peak) Output Enable via pin selection Industrial temperature range available Block Diagram Phase Lock Loop X1 25 MHz crystal /clock X2 Clock Buffer/ Crystal Oscillator CLK CLK Crystal Tuning Capacitors RR(IREF) MDS 557-01 F I n t e gra te d C i r c u i t S y s t e m s - 1 525 Race Stre et, San Jo se, CA 9 5126 - Revision 011606 te l (40 8) 2 97-12 01 - w w w. i c st . c o m ICS557-01 PCI-EXPRESS CLOCK SOURCE Pin Assignment OE X1 X2 GN D 1 2 3 4 8 7 6 5 V DD CL K CL K I RE F 8 P i n ( 1 5 0 mi l ) S OI C Pin Descriptions Pin Number Pin Name Pin...