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ICS85314-01 Datasheet PDF

ICST ICS85314-01

The ICS85314-01 is a low skew, high performance 1-to-5 Differential-to-3.3V LVPECL fanout buffer HiPerClockS™ and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The ICS85314-01 has two selectable clock inputs. The CLK0, nCLK0 pair can accept most standard differential input levels.
Part No. ICS85314-01
Datasheet ICS85314-01 Download
Manufacturer
ICST
Description LVPECL FANOUT BUFFER
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ICS85314-01 datasheet page 1 preview

FEATURES

● 5 differential 2.5V/3.3V LVPECL outputs
● Selectable differential CLK0, nCLK0 or LVCMOS inputs
● CLK0, nCLK0 pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL
● CLK1 can accept the following input levels: LVCMOS or LVTTL
● Maximum output frequency: 650MHz
● Translates any single-ended input signal to 3.3V LVPECL levels with resistor bias on nCLK input
● Output skew: 50ps (maximum)
● Part-to-part skew: 400ps (maximum)
● Propagation delay: CLK0, nCLK0 - 2.1ns (maximum) CLK1 - 2.1ns (maximum)
● LVPECL mode operating voltage supply range: VCC = 2.375V to 3.8V, VEE = 0V
● -40°C to 85°C ambient operating temperature
● Compatible to part number MC100LVEL14

GENERAL DESCRIPTION

The ICS85314-01 has two selectable clock inputs. The single-ended CLK1 can accept LVCMOS or LVTTL input levels. The clock enable is internally synchronized to eliminate runt clock pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin. ,&...
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