IP113A Datasheet | ICp

.. Preliminary Data Sheet 10 /100Base-Tx/Fx Media Converter Features ˜ ˜ ˜ ˜ General Description IP113A can be a 10/100BASE-TX to 100BASE-FX converter or a 100BASE-FX to 100BASE-FX repeater. It consists of a 2-port switch controller, a fast Ethernet transceiver and a PHY for 100BASE-FX. The transceivers in IP113A are designed in DSP approach with advance 0.25-um technology; this results in high noise immunity and robust performance. IP113A not only supports store and forward mode, it also supports modified cut through mode and pure converter mode for low latency data forwarding. IP113A can transmit packet(s) up to 1600 bytes to meet requirement of extra long packets. IP113A supports IEEE802.3x, collision base backpressure, and various LED functions, etc. These functions can be configured to fit the different requirements by feeding operation parameters via EEPROM interface or pull up/down resistors on specified pins. ˜ ˜ ˜ ˜ ˜ ˜ ˜ ˜ ˜ ˜ A 10/100BASE-TX/ 100BASE-FX converter Built in a 10/100BASE-TX transceiver Built in a PHY for 100BASE-FX Built in a 2-port switch - Pass all packets without address and CRC check (optional) - Supports modified cut-through frame forwarding for low latency - Supports pure converter mode data forwarding for extreme low latency - Supports flow control for full and half duplex operation - Bandwidth control - Forward 1600 bytes packet for management - Optional forward fragments Built in 128Kb RAM for data buffer Supports auto MDI-MDIX function Supports link fault pass through function Supports far end fault function LED display for link/activity, full/half, 10/100 Built in a watchdog timer to monitor internal switch error Supports EEPROM Configuration 0.25u CMOS technology Single 2.5V power supply 48-pin LQFP package Block Diagram SSRAM PLL/ Clock Generator RXIP RXIM TXOP TXOM 10/100M TX PHY MII Two port switch 100M FX FXSD FXRDP FXRDM FXTDP FXTDM SCL SDA EEPROM I/F Forward Mode Control LED...