IDT 551S
The 551S is a low cost, high-speed single input to four output clock buffer. The 551S has best in class Additive Phase Jitter of sub 50fsec.| Part No. | 551S |
|---|---|
| Datasheet | 551S Download |
| Manufacturer |  IDT |
| Description | Low Skew 1 to 4 Clock Buffer |
| Buy | Stock & Price |
DESCRIPTION
IDT makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize clocks. Contact IDT for all of your clocking needs.FEATURES
● Low additive phase jitter RMS: 50fs● Extremely low skew outputs (50ps)
● Low cost clock buffer
● Packaged in 8-pin SOIC and 8-pin DFN, Pb-free
● Input/Output clock frequency up to 200MHz
● Non-inverting output clock
● Ideal for networking clocks
● Operating Voltages: 1.8V to 3.3V
● Output Enable mode tri-states outputs
● Advanced, low power CMOS process
● Extended temperature range (-40°C to +105°C) Block Diagram ICLK Q1 Q2 Q3 Q4 Output Enable 551S SEPTEMBER 20, 2018 1 ©2018 Integrated Device Technology, Inc. 551S DATASHEET Pin Assignment ICLK Q1 Q2 Q3 1 2 3 4 8 OE 7 VDD 6 GND 5 Q4 8 Pi
