8SLVD2102 Datasheet PDF - IDT LVDS Output Fanout Buffer Specs

8SLVD2102 - LVDS Output Fanout Buffer

Datasheet Summary

Description

The 8SLVD2102 is a high-performance differential dual 1:2 LVDS fanout buffer.

The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals.

The 8SLVD2102 is characterized to operate from a 2.5V power supply.

Features

Two 1:2, low skew, low additive jitter LVDS fanout buffers.
Two differential clock inputs.
Differential pairs can accept the following differential input levels: LVDS and LVPECL.
Maximum input.

Datasheet Details

Part number	8SLVD2102
Manufacturer	IDT
File Size	479.89 KB
Description	LVDS Output Fanout Buffer
Datasheet	8SLVD2102 Datasheet
Additional preview pages of the 8SLVD2102 datasheet.

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Full PDF Text Transcription

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Dual 1:2, LVDS Output Fanout Buffer 8SLVD2102 DATA SHEET General Description The 8SLVD2102 is a high-performance differential dual 1:2 LVDS fanout buffer. The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals. The 8SLVD2102 is characterized to operate from a 2.5V power supply. Guaranteed output-to-output and part-to-part skew characteristics make the 8SLVD2102 ideal for those clock distribution applications demanding well-defined performance and repeatability. Two independent buffers with two low skew outputs each are available. The integrated bias voltage generators enables easy interfacing of single-ended signals to the device inputs. The device is optimized for low power consumption and low additive phase noise.

Published: Dec 12, 2016 |