Datasheet Details
| Part number | 8SLVD2102 |
|---|---|
| Manufacturer | Renesas |
| File Size | 752.65 KB |
| Description | Dual 1:2 LVDS Output Fanout Buffer |
| Datasheet |
 8SLVD2102 Datasheet
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General Description
The 8SLVD2102 is a high-performance differential dual 1:2 LVDS fanout buffer.
The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals.
The 8SLVD2102 is characterized to operate from a 2.5V power supply.
Key Features
- Two 1:2, low skew, low additive jitter LVDS fanout buffers.
- Two differential clock inputs.
- Differential pairs can accept the following differential input levels: LVDS and LVPECL.
- Maximum input clock frequency: 2GHz.
- Output bank skew: 15ps (maximum).
- Propagation delay: 300ps (maximum).
- Low additive phase jitter: 200fs, RMS (maximum); fREF = 156.25MHz, VPP = 1V, VCMR = 1V, Integration Range 10kHz - 20MHz.
- 2.5V supply voltage.