8SLVP1204 Datasheet PDF - IDT LVPECL Output Fanout Buffer Specs

8SLVP1204 - LVPECL Output Fanout Buffer

Datasheet Summary

Description

The 8SLVP1204 is a high-performance differential LVPECL fanout buffer.

The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals.

The 8SLVP1204 is characterized to operate from a 3.3V or 2.5V power supply.

Features

Four low skew, low additive jitter LVPECL output pairs.
Two selectable, differential clock input pairs.
Differential PCLKx pairs can accept the following differential.

Datasheet Details

Part number	8SLVP1204
Manufacturer	IDT
File Size	648.95 KB
Description	LVPECL Output Fanout Buffer
Datasheet	8SLVP1204 Datasheet
Additional preview pages of the 8SLVP1204 datasheet.

📁 Similar Datasheet

8SLVP1204 - LVPECL Output Fanout Buffer (Renesas)

8SLVP1208 - LVPECL Output Fanout Buffer (Renesas)

8SLVP1212 - LVPECL Output Fanout Buffer (Renesas)

8SLVP1102 - 2.5V LVPECL Output Fanout Buffer (Renesas)

8SLVD1204 - LVDS Output Fanout Buffer (Renesas)

8SLVD1212 - LVDS fanout buffer (Renesas)

8SLVD2102 - Dual 1:2 LVDS Output Fanout Buffer (Renesas)

Full PDF Text Transcription

Click to expand full text

Low Phase Noise, 2:4, 3.3V, 2.5V LVPECL Output Fanout Buffer 8SLVP1204 DATA SHEET General Description The 8SLVP1204 is a high-performance differential LVPECL fanout buffer. The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals. The 8SLVP1204 is characterized to operate from a 3.3V or 2.5V power supply. Guaranteed output-to-output and part-to-part skew characteristics make the 8SLVP1204 ideal for those clock distribution applications demanding well-defined performance and repeatability. Two selectable differential inputs and four low skew outputs are available. The integrated bias voltage reference enables easy interfacing of single-ended signals to the device inputs.

Published: Dec 12, 2016 |