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9DBL02 - 2-output 3.3V PCIe Zero-Delay Buffer

Product Overview

IDT

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9DBL02 2-output 3.3V PCIe Zero-Delay Buffer by IDT - Datasheet Preview — Datasheet preview – 9DBL02

Datasheet Details

Part number	9DBL02
Manufacturer	IDT
File Size	288.27 KB
Description	2-output 3.3V PCIe Zero-Delay Buffer
Datasheet	9DBL02 Datasheet
Additional preview pages of the 9DBL02 datasheet.

Product details

Description

The 9DBL02 devices are 3.3V members of IDT's Full-Featured PCIe family.

The devices support PCIe Gen1-4 Common Clocked (CC) and PCIe Gen2 Separate Reference Independent Spread (SRIS) systems.

Features

2.
1-200 MHz Low-Power (LP) HCSL DIF pairs.
9DBL0242 default ZOUT = 100.
9DBL0252 default ZOUT = 85.
9DBL02P2 factory programmable defaults.
Easy AC-coupling to other logic families, see IDT.

📁 Similar Datasheet

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9DBL0442 - Zero-Delay/Fanout Buffer (Renesas)
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Other Datasheets by IDT

9DBL0242 - 2-output 3.3V PCIe Zero-Delay Buffer
9DBL0243 - 2-Output 3.3V LP-HCSL Zero-Delay Buffer
9DBL0252 - 2-output 3.3V PCIe Zero-Delay Buffer
9DBL0253 - 2-Output 3.3V LP-HCSL Zero-Delay Buffer
9DBL0255 - PCIe Gen1-5 Clock Fanout Buffers
9DBL04 - 4-output 3.3V PCIe Zero-delay Buffer

Published: Dec 13, 2016 |