9DBV0631 Description
The 9DBV0631 is a member of IDT's 1.8V Very-Low-Power (VLP) PCIe family. The device has 6 output enables for clock management and 3 selectable SMBus addresses. Remended Application 1.8V PCIe Gen1-2-3 Zero Delay/Fanout Buffer (ZDB/FOB) Output.
9DBV0631 Key Features
- 1-200 MHz Low-Power (LP) HCSL DIF pairs
- DIF additive cycle-to-cycle jitter <5ps
- DIF output-to-output skew <60ps
- DIF additive phase jitter is <100fs rms for PCIe Gen3
- DIF additive phase jitter <300fs rms for SGMII
- LP-HCSL outputs; save 12 resistors pared to standard
- 55mW typical power consumption in PLL mode; minimal
- Outputs can optionally be supplied from any voltage
- OE# pins; support DIF power management
- HCSL-patible differential input; can be driven by