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9DBV0631 Datasheet PDF

Renesas Electronics 9DBV0631

The 9DBV0631 is a member of Renesas’ 1.8V Very-Low-Power (VLP) PCIe family. The device has 6 output enables for clock management and 3 selectable SMBus addresses.
Part No. 9DBV0631
Datasheet 9DBV0631 Download
Manufacturer
Renesas Electronics
Description 6-Output 1.8V PCIe Zero-Delay/Fanout Clock Buffer
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9DBV0631 datasheet page 1 preview

DESCRIPTION

Recommended Application 1.8V PCIe Gen1–5 Zero Delay/Fanout Buffer (ZDB/FOB) Output

FEATURES

● Six 1–200 MHz Low-Power (LP) HCSL DIF pairs Key Specifications
● DIF additive cycle-to-cycle jitter < 5ps
● DIF output-to-output skew < 60ps
● PCIe Gen5 CC additive phase jitter < 40fs RMS
● 12kHz–20MHz additive phase jitter = 156fs RMS at 156.25MHz (typical) Block Diagram

FEATURES

/Benefits
● LP-HCSL outputs; save 12 resistors compared to standard PCIe devices
● 55mW typical power consumption in PLL mode; minimal power consumption
● Outputs can optionally be supplied from any voltage between 1.05 and 1.8V; maximum power savings
● OE# pins; support DIF power management
● HCSL-compatible differential input; can be driven by common clock sources
● Spread Spectrum tolerant; allows reduction of EMI
● Programmable Slew rate for each output; allows tuning for various line lengths
● Programmable output amplitude; allows tuning for various application environments
● Pin/software selectable...
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