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9FGL0641 Datasheet

6-output 3.3v Pcie Clock Generator

Manufacturer: IDT

Datasheet Details

Part number 9FGL0641
Manufacturer IDT
File Size 319.72 KB
Description 6-Output 3.3V PCIe Clock Generator
Datasheet 9FGL0641-IDT.pdf

9FGL0641 Overview

The 9FGL0641 / 9FGL0651 devices are 3.3V members of IDT's 3.3V Full-Featured PCIe family. The devices have 6 output enables for clock management and support 2 different spread spectrum levels in addition to spread off. The 9FGL0641 / 9FGL0651 supports PCIe Gen1 4 mon Clocked architectures (CC), PCIe Separate Reference no-Spread (SRnS) and Separate Reference Independent Spread (SRIS) clocking architectures.

9FGL0641 Key Features

  • Six 100MHz Low-Power HCSL (LP-HCSL) DIF pairs
  • 9FGL0641 default Zo = 100Ω
  • 9FGL0651 default Zo = 85Ω
  • One 3.3V LVCMOS REF output with Wake-On-LAN (WOL) support
  • See AN-891 for easy AC-coupling to other logic families
  • PCIe Gen1-4 CC pliant; Gen2-3 SRIS pliant
  • DIF cycle-to-cycle jitter < 50ps
  • DIF output

9FGL0641 Distributor