9FGV0841 Description
The 9FGV0841 is a member of IDT's SOC-Friendly 1.8V Very-Low-Power PCIe clock family. It has integrated output terminations providing Zo=100 for direction connection to 100 transmission lines. The device has 8 output enables for clock management, 2 different spread spectrum levels in addition to spread off and 2 selectable SMBus addresses.
9FGV0841 Key Features
- 100MHz Low-Power (LP) HCSL DIF pairs w/Zo=100
- 1.8V LVCMOS REF output w/Wake-On-LAN (WOL)
- DIF cycle-to-cycle jitter <50ps
- DIF output-to-output skew <50ps
- DIF phase jitter is PCIe Gen1-2-3 pliant
- REF phase jitter is < 1.5ps RMS
- Direct connection to 100Ω transmission lines; saves 32
- 62mW typical power consumption; reduced thermal