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9FGV0841 - Very Low-Power PCIe Gen1-4 Clock Generator

Datasheet Summary

Description

The 9FGV0841 is a member of IDT's SOC-friendly 1.8V very low-power PCIe clock family.

It has integrated output terminations providing Zo = 100Ω for direction connection to 100Ω transmission lines.

Features

  • Eight 100MHz Low-Power HCSL (LP-HCSL) DIF pairs with Zo = 100Ω.
  • One 1.8V LVCMOS REF output with Wake-On-LAN (WOL) support Key Specifications.
  • DIF cycle-to-cycle jitter < 50ps.
  • DIF output-to-output skew < 50ps.
  • DIF phase jitter is PCIe Gen1.
  • 4 compliant.
  • REF phase jitter is < 1.5ps RMS Features.
  • Direct connection to 100Ω transmission lines; saves 32 resistors compared to standard PCIe devices.
  • 62mW typical power consumption; reduced thermal concern.

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Datasheet preview – 9FGV0841

Datasheet Details

Part number 9FGV0841
Manufacturer Renesas
File Size 910.92 KB
Description Very Low-Power PCIe Gen1-4 Clock Generator
Datasheet download datasheet 9FGV0841 Datasheet
Additional preview pages of the 9FGV0841 datasheet.

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Full PDF Text Transcription

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8-Output Very Low-Power PCIe Gen1–4 Clock Generator with Zo = 100ohms 9FGV0841 Datasheet Description The 9FGV0841 is a member of IDT's SOC-friendly 1.8V very low-power PCIe clock family. It has integrated output terminations providing Zo = 100Ω for direction connection to 100Ω transmission lines. The device has 8 output enables for clock management, 2 different spread spectrum levels in addition to spread off, and 2 selectable SMBus addresses. Typical Applications ▪ PCIe Gen1–4 clock generation for Riser Cards ▪ Storage ▪ Networking ▪ JBOD ▪ Communications ▪ Access Points Output Features ▪ Eight 100MHz Low-Power HCSL (LP-HCSL) DIF pairs with Zo = 100Ω ▪ One 1.
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