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IDT49C465A - 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT

This page provides the datasheet information for the IDT49C465A, a member of the IDT49C465 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT family.

Description

The IDT49C465/A is a 32-bit, two-data bus, Flow-thruEDC unit.

The chip provides single-error correction and two and three bit error detection of both hard and soft memory errors.

Features

  • 32-bit wide Flow-thruEDC™ unit, cascadable to 64 bits.
  • Single-chip 64-bit Generate Mode.
  • Separate system and memory buses.
  • On-chip pipeline latch with external control.
  • Supports bidirectional and common I/O memories.
  • Corrects all single-bit errors.
  • Detects all double-bit errors, some multiple-bit errors.
  • Error Detection Time.
  • 12ns.
  • Error Correction Time.
  • 14ns.
  • On chip diagnostic registers.

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Datasheet preview – IDT49C465A

Datasheet Details

Part number IDT49C465A
Manufacturer IDT
File Size 402.45 KB
Description 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT
Datasheet download datasheet IDT49C465A Datasheet
Additional preview pages of the IDT49C465A datasheet.

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Full PDF Text Transcription

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Integrated Device Technology, Inc. 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT IDT49C465 IDT49C465A FEATURES • 32-bit wide Flow-thruEDC™ unit, cascadable to 64 bits • Single-chip 64-bit Generate Mode • Separate system and memory buses • On-chip pipeline latch with external control • Supports bidirectional and common I/O memories • Corrects all single-bit errors • Detects all double-bit errors, some multiple-bit errors • Error Detection Time — 12ns • Error Correction Time — 14ns • On chip diagnostic registers. • Parity generation and checking on system data bus • Low power CMOS — 100mA typical at 20MHZ • 144-pin PGA and PQFP packages • Military product compliant to MIL-STD 883, Class B DESCRIPTION The IDT49C465/A is a 32-bit, two-data bus, Flow-thruEDC unit.
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