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IDT49C465 - 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT

Datasheet Summary

Description

The IDT49C465/A is a 32-bit, two-data bus, Flow-thruEDC unit.

The chip provides single-error correction and two and three bit error detection of both hard and soft memory errors.

It can be expanded to 64-bit widths by cascading 2 units, without the need for additional external logic.

Features

  • 32-bit wide Flow-thruEDC™ unit, cascadable to 64 bits Single-chip 64-bit Generate Mode Separate system and memory buses On-chip pipeline latch with external control Supports bidirectional and common I/O memories Corrects all single-bit errors Detects all double-bit errors, some multiple-bit errors Error Detection Time.
  • 12ns Error Correction Time.

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Datasheet preview – IDT49C465

Datasheet Details

Part number IDT49C465
Manufacturer Integrated Device
File Size 402.45 KB
Description 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT
Datasheet download datasheet IDT49C465 Datasheet
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Full PDF Text Transcription

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32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT Integrated Device Technology, Inc. IDT49C465 IDT49C465A FEATURES • • • • • • • • • • • • • • 32-bit wide Flow-thruEDC™ unit, cascadable to 64 bits Single-chip 64-bit Generate Mode Separate system and memory buses On-chip pipeline latch with external control Supports bidirectional and common I/O memories Corrects all single-bit errors Detects all double-bit errors, some multiple-bit errors Error Detection Time — 12ns Error Correction Time — 14ns On chip diagnostic registers. Parity generation and checking on system data bus Low power CMOS — 100mA typical at 20MHZ 144-pin PGA and PQFP packages Military product compliant to MIL-STD 883, Class B DESCRIPTION The IDT49C465/A is a 32-bit, two-data bus, Flow-thruEDC unit.
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