IDT70P3337 Datasheet | IDT

1024K/512K x18 SYNCHRONOUS DUAL QDR-IITM PRELIMINARY DATASHEET IDT70P3307 IDT70P3337 ® Features - 18Mb Density (1024K x 18) - Also available 9Mb Density (512K x 18) - QDR-II x 18 Burst-of-2 Interface - mercial: 233MHz, 250MHz - Separate, Independent Read and Write Data Ports - Supports concurrent transactions - Dual Echo Clock Output - Two-Word Burst on all DPRAM accesses - DDR (Double Data Rate) Multiplexed Address Bus - One Read and One Write request per clock cycle - DDR (Double Data Rate) Data Buses - Four word burst data (Two Read and Two Write) per clock on each port - Four word transfers per clock cycle per port (four word bursts on 2 ports) - Port Enable pins (E0,E1) for depth expansion - Dual Echo Clock Output with DLL-based phase alignment - High Speed Transceiver Logic inputs that can be scaled to receive signals from 1.4V to 1.9V - Scalable output drivers - Drives HSTL, 1.8V TTL or any voltage level from 1.4V to 1.9V - Output impedance adjustable from 35 ohms to 70 ohms - 1.8V Core Voltage (VDD) - 576-ball Flip Chip BGA (25mm x 25mm, 1.0mm ball pitch) - JTAG Interface - IEEE 1149.1 pliant Functional Block Diagram EL[1:0] D0...