IDT72T51556 Datasheet PDF - IDT (IDT72T51546 / IDT72T51556) 2.5V MULTI-QUEUE FLOW-CONTROL DEVICES Specs

IDT72T51556 - (IDT72T51546 / IDT72T51556) 2.5V MULTI-QUEUE FLOW-CONTROL DEVICES

This page provides the datasheet information for the IDT72T51556, a member of the IDT72T51546 (IDT72T51546 / IDT72T51556) 2.5V MULTI-QUEUE FLOW-CONTROL DEVICES family.

Datasheet Summary

Description

The IDT72T51546/72T51556 multi-queue flow-control devices is a single chip within which anywhere between 1 and 32 discrete FIFO queues can be setup.

All queues within the device have a common data input bus, (write port) and a common data output bus, (read port).

Features

Choose from among the following memory density options: IDT72T51546  Total Available Memory = 1,179,648 bits IDT72T51556  Total Available Memory = 2,359,296 bits Configurable from 1 to 32 Queues Queues may be configured at master reset from the pool of Total Available Memory in blocks of 256 x 36 Independent Read and Write access per queue User program.

Datasheet Details

Part number	IDT72T51556
Manufacturer	IDT
File Size	636.36 KB
Description	(IDT72T51546 / IDT72T51556) 2.5V MULTI-QUEUE FLOW-CONTROL DEVICES
Datasheet	IDT72T51556 Datasheet
Additional preview pages of the IDT72T51556 datasheet.

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Full PDF Text Transcription

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www.DataSheet4U.com ADVANCE INFORMATION 2.5V MULTI-QUEUE FLOW-CONTROL DEVICES (32 QUEUES) 36 BIT WIDE CONFIGURATION 1,179,648 bits and 2,359,296 bits IDT72T51546 IDT72T51556 FEATURES: • • • • • • • • • • • • • • Choose from among the following memory density options: IDT72T51546  Total Available Memory = 1,179,648 bits IDT72T51556  Total Available Memory = 2,359,296 bits Configurable from 1 to 32 Queues Queues may be configured at master reset from the pool of Total Available Memory in blocks of 256 x 36 Independent Read and Write access per queue User programmable via serial port User selectable I/O: 2.5V LVTTL, 1.5V HSTL, 1.

Published: Dec 16, 2006 |