Datasheet4U Logo Datasheet4U.com

IN74ACT109 - Dual J-K Positive-Edge-Triggered Flip-Flop

📥 Download Datasheet

Datasheet preview – IN74ACT109

Datasheet Details

Part number IN74ACT109
Manufacturer IK Semiconductor
File Size 282.48 KB
Description Dual J-K Positive-Edge-Triggered Flip-Flop
Datasheet download datasheet IN74ACT109 Datasheet
Additional preview pages of the IN74ACT109 datasheet.
Other Datasheets by IK Semiconductor

Full PDF Text Transcription

Click to expand full text
TECHNICAL DATA IN74ACT109 Dual J-K Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS The IN74ACT109 is identical in pinout to the LS/ALS109, HC/HCT109. The IN74ACT109 may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs. This device consists of two J-K flip-flops with individual set, reset, and clock inputs. Changes at the inputs are reflected at the outputs with the next low-to-high transition of the clock. Both Q to Q outputs are available from each flip-flop. • TTL/NMOS Compatible Input Levels • Outputs Directly Interface to CMOS, NMOS, and TTL • Operating Voltage Range: 4.5 to 5.5 V • Low Input Current: 1.0 µA; 0.
Published: |