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IN74HC109A - Dual J-K Positive-Edge-Triggered Flip-Flop

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Datasheet Details

Part number IN74HC109A
Manufacturer IK Semiconductor
File Size 154.61 KB
Description Dual J-K Positive-Edge-Triggered Flip-Flop
Datasheet download datasheet IN74HC109A Datasheet

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TECHNICAL DATA Dual J-K Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS IN74HC109A The IN74HC109A is identical in pinout to the LS/ALS109. The device inputs are compatible with standard CMOS outputs, with pullup resistors, they are compatible with LS/ALSTTL outputs. This device consists of two J-K flip-flops with individual set, reset, and clock inputs. Changes at the inputs are reflected at the outputs with the next low-to-high transition of the clock. Both Q to Q outputs are available from each flip-flop. • Outputs Directly Interface to CMOS, NMOS, and TTL • Operating Voltage Range: 2.0 to 6.0 V • Low Input Current: 1.