Datasheet4U Logo Datasheet4U.com

IN74HC112A - Dual J-K Negative-Edge-Triggered Flip-Flop

📥 Download Datasheet

Datasheet Details

Part number IN74HC112A
Manufacturer IK Semiconductor
File Size 235.23 KB
Description Dual J-K Negative-Edge-Triggered Flip-Flop
Datasheet download datasheet IN74HC112A Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
TECHNICAL DATA IN74HC112A Dual J-K Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS The IN74HC112A is identical in pinout to the LS/ALS112. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. Each flip-flop is negative-edge clocked and has active-low asynchronous Set and Reset inputs. • Outputs Directly Interface to CMOS, NMOS, and TTL • Operating Voltage Range: 2.0 to 6.0 V • Low Input Current: 1.