IN74LV273 Datasheet | IK Semiconductor

TECHNICAL DATA Octal D Flip-Flop with mon Clock and Reset The IN74LV273 is a low-voltage Si-gate CMOS device and is pin and function patible with the 74HC/HCT273. The IN74LV273 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The mon clock (CP) and master reset (MR) inputs load and reset (clear) all flip-flops simultaneously. The state of each D input, one set-up time before the LOW-to-HIGH clock transition, is transferred to the corresponding output (Qn) of the flip-flop. All outputs will be forced LOW independently of clock or data inputs by a LOW voltage level on the MR input. The device is useful for applications where the true output only is required and the clock and master reset are mon to all storage elements. - Output voltage levels are patible with input levels of CMOS, NMOS and TTL ICS - Supply voltage range: 1.2 to 5.5 V - Low input current: 1.0 µА; 0.1 µА at Т = 25 °С - High Noise Immunity Characteristic of CMOS Devices N SUFFIX PLASTIC DIP 1 20 1 DW SUFFIX SO ORDERING INFORMATION IN74LV273N Plastic DIP IN74LV273DW SOIC TA = -40° to 125° C for all packages PIN ASSIGNMENT LOGIC DIAGRAM RESET Q0 D0 D1 Q1 Q2 D2 D3 Q3 GND 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 V CC Q7 D7 D6 Q6 Q5 D5 Q4 CLOCK FUNCTION TABLE Inputs Reset L H Clock X D X H L L X X Output Q L H L no change no change w w a d . w e h s a t u 4 et .c PIN 20=VCC PIN 10 = GND om H H H H= high level L = low level X = don’t care Z = high impedance .. D4 MAXIMUM RATINGS- Symbol VCC IIK - IO - ICC IGND PD 1 2 Parameter DC supply voltage Input diode current Output diode current Output source or sink current VCC current GND current Power dissipation per package: Plastic DIP - 4 SO - 4 Storage Temperature Lead Temperature, 1.5 mm (Plastic DIP Package), 0.3 mm (SO Package) from Case for 4 Seconds Value -0.5 to +7.0 ±20 ±50 ±25 ±50 ±50 750 500 -65 to +150 260 Unit V m A m A m A m A m A m W - 3 Tstg TL - °C...