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IS45S32800G - 256Mb SYNCHRONOUS DRAM

Download the IS45S32800G datasheet PDF. This datasheet also covers the IS42S32800G variant, as both devices belong to the same 256mb synchronous dram family and are provided as variant models within a single manufacturer datasheet.

General Description

A0-A11 Row Address Input A0-A8 Column Address Input BA0, BA1 Bank Select Address DQ0 to DQ31 Data I/O CLK System Clock Input CKE Clock Enable CS Chip Select RAS Row Address Strobe Command CAS Column Address Strobe Command WE DQM0-DQM3 Vdd Vss Vddq V

Key Features

  • Clock frequency: 200, 166, 143 MHz.
  • Fully synchronous; all signals referenced to a positive clock edge.
  • Internal bank for hiding row access/precharge.
  • Single Power supply: 3.3V + 0.3V.
  • LVTTL interface.
  • Programmable burst length.
  • (1, 2, 4, 8, full page).
  • Programmable burst sequence: Sequential/Interleave.
  • Auto Refresh (CBR).
  • Self Refresh.
  • 4096 refresh cycles every 16ms (A2 grade) or 64 ms.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (IS42S32800G-ISSI.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
IS42S32800G IS45S32800G 8M x 32 256Mb SYNCHRONOUS DRAM AUGUST 2012 FEATURES • Clock frequency: 200, 166, 143 MHz • Fully synchronous; all signals referenced to a positive clock edge • Internal bank for hiding row access/precharge • Single Power supply: 3.3V + 0.