IS45VM16800E Overview
ISSI's 128Mb Mobile Synchronous DRAM achieves highspeed data transfer using pipeline architecture. All input and output signals refer to the rising edge of the clock input. Both write and read accesses to the SDRAM are burst oriented.
IS45VM16800E Key Features
- Fully synchronous; all signals referenced to a
- Internal bank for hiding row access and pre
- Programmable CAS latency: 2, 3
- Programmable Burst Length: 1, 2, 4, 8, and Full
- Programmable Burst Sequence
- Sequential and Interleave
- Auto Refresh (CBR)
- TCSR (Temperature pensated Self Refresh)
- PASR (Partial Arrays Self Refresh): 1/16, 1/8
- Deep Power Down Mode (DPD)