IS61LF25632
Overview
The ISSI IS61LF25632, IS61LF25636, and IS61LF51218 are high-speed, low-power synchronous static RAMs designed to provide a burstable, high-performance and memories for commucation and networking applications. The IS61LF25632 is organized as 262,144 words by 32 bits and the IS61LF25636 is organized as 262,144 words by 36 bits.
- Internal self-timed write cycle
- Individual Byte Write Control and Global Write
- Clock controlled, registered address, data and control
- Interleaved or linear burst sequence control using MODE input
- Three chip enable option for simple depth expansion and address pipelining
- Common data inputs and data outputs
- JEDEC 100-Pin TQFP and 119-pin PBGA package
- Power Supply + 3.3V VDD + 3.3V or 2.5V VDDQ (I/0)
- Snooze MODE for reduced-power standby
- T version (three chip selects)
