Datasheet Summary
( DataSheet : .. )
IS61LF25632T/D/J IS61LF25636T/D/J IS61LF51218T/D/J
256K x 32, 256K x 36, 512K x 18 SYNCHRONOUS FLOW-THROUGH STATIC RAM
Features
- Internal self-timed write cycle
- Individual Byte Write Control and Global Write
- Clock controlled, registered address, data and control
- Interleaved or linear burst sequence control using MODE input
- Three chip enable option for simple depth expansion and address pipelining
- mon data inputs and data outputs
- JEDEC 100-Pin TQFP and 119-pin PBGA package
- Power Supply + 3.3V VDD + 3.3V or 2.5V VDDQ (I/0)
- Snooze MODE for reduced-power standby
- T version (three chip selects)
- J version (PBGA Package with JTAG)
- D...
