Datasheet Summary
IS61NLP12832A IS61NLP12836A/IS61NVP12836A IS61NLP25618A/IS61NVP25618A
128K x 32, 128K x 36, and 256K x 18 4Mb, PIPELINE 'NO WAIT' STATE BUS SRAM
ISSI
®
PRELIMINARY INFORMATION SEPTEMBER 2005
Features
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DESCRIPTION
The 4 Meg 'NLP/NVP' product family feature high-speed, low-power synchronous static RAMs designed to provide a burstable, high-performance, 'no wait' state, device for networking and munications applications. They are organized as 128K words by 32 bits, 128K words by 36 bits, and 256K words by 18 bits, fabricated with ISSI's advanced CMOS technology. Incorporating a 'no wait' state feature, wait cycles are eliminated when the bus switches from read to...