IS61NLP51218A - 9Mb STATE BUS SRAM

Product Overview

ISSI

Datasheet Details

Part number	IS61NLP51218A
Manufacturer	ISSI
File Size	681.44 KB
Description	9Mb STATE BUS SRAM
Datasheet	IS61NLP51218A Datasheet
Note	This datasheet PDF includes multiple part numbers: IS61NLP51218A, IS61NVP25636A. Please refer to the document for exact specifications by model.
Additional preview pages of the IS61NLP51218A datasheet.

Product details

Description

The 9 Meg 'NLP/NVP' product family feature high-speed, low-power synchronous static RAMs designed to provide a burstable, high-performance, 'no wait' state, device for networking and communications applications.

Features

100 percent bus utilization.
No wait cycles between Read and Write.
Internal self-timed write cycle.
Individual Byte Write Control.
Single R/W (Read/Write) control pin.
Clock controlled, registered address, data and control.
Interleaved or linear burst sequence control us- ing MODE input.
Three chip enables for simple depth expansion and address pipelining.
Power Down mode.
Common data inputs and data outp.

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Other Datasheets by ISSI

IS61NLP51218B - 9Mb STATE BUS SRAM
IS61NLP51232B - 18Mb STATE BUS SYNCHRONOUS SRAM
IS61NLP51236 - (IS61NVPxxxxx) STATE BUS SRAM
IS61NLP51236B - 18Mb STATE BUS SYNCHRONOUS SRAM
IS61NLP102418 - (IS61NVPxxxxx) STATE BUS SRAM
IS61NLP102418B - 18Mb STATE BUS SYNCHRONOUS SRAM

Published: Jul 12, 2008 |