IS61NVP10018 Description
® PRELIMINARY INFORMATION SEPTEMBER 2002 The 18 Meg 'NVP' product family.
IS61NVP10018 Key Features
- 100 percent bus utilization
- No wait cycles between Read and Write
- Internal self-timed write cycle
- Individual Byte Write Control
- Single R/W (Read/Write) control pin
- Clock controlled, registered address, data and control
- Interleaved or linear burst sequence control using MODE input
- Three chip enables for simple depth expansion and address pipelining for TQFP
- Power Down mode
- mon data inputs and data outputs