Datasheet Details
| Part number | IS61QDB21M18C |
|---|---|
| Manufacturer | ISSI (now Infineon) |
| File Size | 929.02 KB |
| Description | 18Mb QUAD Synchronous SRAM |
| Datasheet |
 IS61QDB21M18C Datasheet
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General Description
The 18Mb IS61QDB251236C and IS61QDB21M18C are synchronous, high-performance CMOS static random access memory (SRAM) devices.
These SRAMs have separate I/Os, eliminating the need for high-speed bus turnaround.
Key Features
- 512Kx36 and 1Mx18 configuration available.
- On-chip Delay-Locked Loop (DLL) for wide data valid window.
- Separate independent read and write ports with concurrent read and write operations.
- Synchronous pipeline read with EARLY write operation.
- Double Data Rate (DDR) interface for read and write input ports.
- Fixed 2-bit burst for read and write operations.
- Clock stop support.
- Two input clocks (K and K#) for address and control registering at rising ed.