IS61QDPB251236A - 18Mb QUADP (Burst 2) Synchronous SRAM

This page provides the datasheet information for the IS61QDPB251236A, a member of the IS61QDPB21M18A 18Mb QUADP (Burst 2) Synchronous SRAM family.

Product Overview

ISSI

Part number	IS61QDPB251236A
Manufacturer	ISSI
File Size	600.50 KB
Description	18Mb QUADP (Burst 2) Synchronous SRAM
Datasheet	IS61QDPB251236A Datasheet
Additional preview pages of the IS61QDPB251236A datasheet.

devices.

need for high-speed bus turnaround.

operations are self-timed.

512Kx36 and 1Mx18 configuration available.
On-chip Delay-Locked Loop (DLL) for wide data valid window.
Separate independent read and write ports with concurrent read and write operations.
Synchronous pipeline read with EARLY write operation.
Double Data Rate (DDR) interface for read and write input ports.
2.5 Cycle read latency.
Fixed 2-bit burst for read and write operations.
Clock stop support.
Two input clocks (K and K#) for address and co.

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IS61C25616 - 256K x 8 High Speed CMOS STATIC RAM (Integrated Silicon Solution)
IS61C25616AL - 256K x 16 HIGH-SPEED CMOS STATIC RAM (Integrated Silicon Solution)
IS61C25616AS - 256K x 16 HIGH-SPEED CMOS STATIC RAM (Integrated Silicon Solution)
IS61C256AH - 32K x 8 HIGH-SPEED CMOS STATIC RAM (Integrated Silicon Solution)
IS61C256AL - 32K x 8 High Speed CMOS STATIC RAM (Integrated Silicon Solution)
IS61C3216AL - 32K x 16 HIGH-SPEED CMOS STATIC RAM (Integrated Silicon Solution)
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Published: Jun 10, 2016 |