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IS61SPS25636T - 256Kx32 Synchronous Pipelined Static RAM

This page provides the datasheet information for the IS61SPS25636T, a member of the IS61SPS25632D 256Kx32 Synchronous Pipelined Static RAM family.

Datasheet Summary

Description

IS61LPS25632, IS61LPS25636, and IS61LPS51218 are high-speed, low-power synchronous static RAMs designed to provide a burstable, high-performance memory for communication and networking applications.

Features

  • Internal self-timed write cycle.
  • Individual Byte Write Control and Global Write.
  • Clock controlled, registered address, data and control.
  • Linear burst sequence control using MODE input.
  • Three chip enable option for simple depth expansion and address pipelining.
  • Common data inputs and data outputs.
  • JEDEC 100-Pin TQFP and 119-pin PBGA package.
  • Single +3.3V, +10%,.
  • 5% power supply.
  • Power-down snooze mode.

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Datasheet preview – IS61SPS25636T

Datasheet Details

Part number IS61SPS25636T
Manufacturer ISSI
File Size 172.78 KB
Description 256Kx32 Synchronous Pipelined Static RAM
Datasheet download datasheet IS61SPS25636T Datasheet
Additional preview pages of the IS61SPS25636T datasheet.

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Full PDF Text Transcription

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IS61SPS25632T/D IS61LPS25632T/D IS61SPS25636T/D IS61LPS25636T/D IS61SPS51218T/D IS61LPS51218T/D 256K x 32, 256K x 36, 512K x 18 SYNCHRONOUS PIPELINE, SINGLE-CYCLE DESELECT STATIC RAM FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Linear burst sequence control using MODE input • Three chip enable option for simple depth expansion and address pipelining • Common data inputs and data outputs • JEDEC 100-Pin TQFP and 119-pin PBGA package • Single +3.3V, +10%, –5% power supply • Power-down snooze mode • 3.3V I/O For SPS • 2.
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