IS61VF25618A Overview
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IS61VF25618A Key Features
- Internal self-timed write cycle
- Individual Byte Write Control and Global Write
- Clock controlled, registered address, data and control
- Burst sequence control using MODE input
- Three chip enable option for simple depth expansion and address pipelining
- mon data inputs and data outputs
- Auto Power-down during deselect
- Single cycle deselect
- Snooze MODE for reduced-power standby
- JEDEC 100-Pin TQFP, 119-pin PBGA, and 165-pin PBGA packages