IXTH7P50 Description
+150 V V V V A A A A A A mJ W °C °C °C °C Nm/lb.in. g TO-247 AD D (TAB) G = Gate, S = Source, D = Drain, TAB = Drain.
IXTH7P50 Key Features
- International standard package
- Low R HDMOS process
- Rugged polysilicon gate cell structure
- Unclamped Inductive Switching (UIS)
- Low package inductance (<5 nH)
- easy to drive and to protect