IPSH6N03LB Description
Type IPUH6N03LB IPSH6N03LB OptiMOS®2 Power-Transistor Package Marking Qualified according to JEDEC1) for target applications N-channel - Logic level Excellent gate charge x R DS(on) product (FOM) Superior 175 °C operating temperature Pb-free lead plating; 175 55/175/56 J-STD20 and JESD22 Rev. 0.3 page 1 2006-05-15 .DataSheet.in IPUH6N03LB Parameter Symbol Conditions min.