CYT4BF8CEDQ0AESGS Datasheet | Infineon

CYT4BF TRAVEO™ T2G 32-bit Automotive MCU Based on Arm® Cortex®-M7 dual General description CYT4BF is a family of TRAVEO™ T2G microcontrollers targeted at automotive systems such as high-end body-control units. CYT4BF has two Arm® Cortex®-M7 CPUs for primary processing, and an Arm® Cortex®-M0+ CPU for peripheral and security processing. These devices contain embedded peripherals supporting Controller Area Network with Flexible Data rate (CAN FD), Local Interconnect Network (LIN), Gigabit Ethernet, and Flex Ray. TRAVEO™ T2G devices are manufactured on an advanced 40-nm process. CYT4BF incorporates a low-power flash memory, multiple high-performance analog and digital peripherals, and enables the creation of a secure puting platform. Features - CPU subsystem - Two 350-MHz 32-bit Arm® Cortex®-M7 CPUs, each with - Single-cycle multiply - Single/double-precision floating point unit (FPU) - 16-KB data cache, 16-KB instruction cache - Memory protection unit (MPU) - 16-KB instruction and 16-KB data tightly-coupled memories (TCM) - 100-MHz 32-bit Arm® Cortex® M0+ CPU with - Single-cycle multiply - Memory protection unit (MPU) - Inter-processor munication in hardware - Three DMA controllers - Peripheral DMA controller #0 (P-DMA0) with 143 channels - Peripheral DMA controller #1 (P-DMA1) with 65 channels - Memory DMA controller (M-DMA0) with 8 channels - Integrated memories - 8384 KB of code-flash with an additional 256 KB of work-flash - Read-While-Write (RWW) allows updating the code-flash/work-flash while executing from it - Single- and dual-bank modes (specifically for Firmware update Over The Air [FOTA]) - Flash programming through SWD/JTAG interface - 1024-KB of SRAM with selectable retention granularity - Cryptography engine - Supports Enhanced Secure Hardware Extension (e SHE) and Hardware Security Module (HSM) - Secure boot and...