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IS41C8512 - 512K x 8 (4-MBIT) DYNAMIC RAM

General Description

high-performance CMOS Dynamic Random Access Memories.

The IS41C8512 offer an accelerated cycle access called EDO Page Mode.

EDO Page Mode allows 512 random accesses within a single row with access cycle time as short as 10 ns per 8-bit.

Key Features

  • make the IS41C8512and IS41LV8512 ideally suited for high-bandwidth graphics, digital signal processing, high-performance computing systems, and peripheral.

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Datasheet Details

Part number IS41C8512
Manufacturer Integrated Circuit Solution
File Size 245.88 KB
Description 512K x 8 (4-MBIT) DYNAMIC RAM
Datasheet download datasheet IS41C8512 Datasheet

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Other Datasheets by Integrated Circuit Solution

Part Number Description
IS41LV8512 512K x 8 (4-MBIT) DYNAMIC RAM
IS42LS16800A 128-MBIT SYNCHRONOUS DRAM
IS42LS32400A 128-MBIT SYNCHRONOUS DRAM
IS42LS81600A 128-MBIT SYNCHRONOUS DRAM
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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IS41C8512 IS41LV8512 .EATURES www.datasheet4u.com 512K x 8 (4-MBIT) DYNAMIC RAM WITH EDO PAGE MODE Extended Data-Out (EDO) Page Mode access cycle TTL compatible inputs and outputs; tristate I/O Refresh Interval: 1024 cycles /16 ms Refresh Mode: RAS-Only, CAS-before-RAS (CBR), Hidden • JEDEC standard pinout • Single power supply: 5V ± 10% (IS41C8512) 3.3V ± 10% (IS41LV8512) • Byte Write and Byte Read operation via CAS • Industrail Temperature Range -40oC to 85oC • • • • DESCRIPTION The 1+51 IS41C8512 and IS41LV8512 is a 524,288 x 8-bit high-performance CMOS Dynamic Random Access Memories. The IS41C8512 offer an accelerated cycle access called EDO Page Mode. EDO Page Mode allows 512 random accesses within a single row with access cycle time as short as 10 ns per 8-bit.