ICS527-01 Datasheet PDF - Integrated Circuit Systems User Configurable Zero Delay Buffer Specs

ICS527-01 - User Configurable Zero Delay Buffer

Datasheet Summary

Description

The ICS527-01 Clock Slicer™ is the most flexible way to generate an output clock from an input clock with zero skew.

The user can easily configure the device to produce nearly any output clock that is multiplied or divided from the input clock.

Features

Packaged as 28 pin SSOP (150 mil body).
Synchronizes fractional clocks rising edges.
User determines the output frequency - no software needed.
Slices frequency or period.
SYNC pulse output indicates aligned edges.
Input clock frequency of 600 kHz - 200 MHz.
Output clock frequencies up to 160 MHz.
Very low jitter.
Duty cycle of 45/55 up to 160 MHz.
Operating voltage of 3.3 V (±10%).
Pin selectable.

Datasheet Details

Part number	ICS527-01
Manufacturer	Integrated Circuit Systems
File Size	135.03 KB
Description	User Configurable Zero Delay Buffer
Datasheet	ICS527-01 Datasheet
Additional preview pages of the ICS527-01 datasheet.

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Full PDF Text Transcription

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www.DataSheet4U.com ICS527-01 Clock Slicer™ User Configurable Zero Delay Buffer Description The ICS527-01 Clock Slicer™ is the most flexible way to generate an output clock from an input clock with zero skew. The user can easily configure the device to produce nearly any output clock that is multiplied or divided from the input clock. The part supports non-integer multiplications and divisions. A SYNC pulse indicates the rising clock edges that are aligned with zero skew. Using Phase-Locked Loop (PLL) techniques, the device accepts an input clock up to 200 MHz and produces an output clock up to 160 MHz. The ICS527-01 aligns rising edges on ICLK and FBIN at a ratio determined by the reference and feedback dividers. For configurable clocks that do not require zero delay, use the ICS525.

Published: Jun 8, 2006 |