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ICS8516 Datasheet PDF

Integrated Circuit Systems ICS8516

The ICS8516 is a low skew, high performance 1-to-16 Differential-to-LVDS Clock Distribution HiPerClockS™ Chip and a member of the HiPerClock S ™ family of High Performance Clock Solutions from ICS. The ICS8516 CLK, nCLK pair can accept any differential input levels and translates them to 3.3V LVDS output levels. Utilizing Low Voltage Differential Signaling (LVDS), the ICS8516 provides a low power, low noise, pointto-point solution for distributing clock signals over controlled impedances of 100Ω.
Part No. ICS8516
Datasheet ICS8516 Download
Manufacturer
Integrated Circuit Systems
Description 1-TO-16 DIFFERENTIAL-TO-LVDS CLOCK DISTRIBUTION
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ICS8516 datasheet page 1 preview

FEATURES

● Sixteen differential LVDS outputs
● CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL
● Maximum output frequency: 700MHz
● Translates any differential input signal (LVPECL, LVHSTL, SSTL, DCM) to LVDS levels without external bias networks
● Translates any single-ended input signal to LVDS with resistor bias on nCLK input
● Multiple output enable inputs for disabling unused outputs in reduced fanout applications
● LVDS compatible
● Output skew: 90ps (maximum)
● Part-to-part skew: 500ps (maximum)
● Propagation delay: 2.4ns (maximum)
● Additive phase jitter, RMS: 148fs (typical)
● 3.3V operating supply
● 0°C to 70°C ambient operating temperature
● Available in both standard and lead-free RoHS compliant packages

GENERAL DESCRIPTION

IC S Dual output enable inputs allow the ICS8516 to be used in a 1-to-16 or 1-to-8 input/output mode. Guaranteed output and part-to-part skew specifications make the ICS8516 ideal for those applications demanding well defined performance and repeatability.
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