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ICS9112-16 - Low Skew Output Buffer

General Description

General a The ICS9112-16 is a high performance, low skew, low jitter .D It uses clock driver.

a phase lock loop (PLL) technology w to align, in both phase and frequency, the REF input with the signal.

It is designed to distribute high speed w CLKOUT clocks in PC w133 MHz.

Key Features

  • Zero input - output delay Frequency range 25 - 133 MHz (3.3V) High loop filter bandwidth ideal for Spread Spectrum.

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Datasheet Details

Part number ICS9112-16
Manufacturer Integrated Circuit Systems
File Size 104.61 KB
Description Low Skew Output Buffer
Datasheet download datasheet ICS9112-16 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Integrated Circuit Systems, Inc. S a t Description General a The ICS9112-16 is a high performance, low skew, low jitter .D It uses clock driver. a phase lock loop (PLL) technology w to align, in both phase and frequency, the REF input with the signal. It is designed to distribute high speed w CLKOUT clocks in PC w133 MHz. systems operating at speeds from 25 to ICS9112-16 is a zero delay buffer that provides synchronization between the input and output. The synchronization is established via CLKOUT feed back to the input of the PLL. Since the skew between the input and output is less than +/- 350 pS, the part acts as a zero delay buffer. The ICS9112-16 comes in an eight pin 150 mil SOIC or 173 mil TSSOP package. It has five output clocks.