Datasheet Summary
Integrated Circuit Systems, Inc.
S a t Description General a The ICS9112-16 is a high performance, low skew, low jitter .D It uses clock driver. a phase lock loop (PLL) technology w to align, in both phase and frequency, the REF input with the signal. It is designed to distribute high speed w CLKOUT clocks in PC w133 MHz. systems operating at speeds from 25 to
ICS9112-16 is a zero delay buffer that provides synchronization between the input and output. The synchronization is established via CLKOUT feed back to the input of the PLL. Since the skew between the input and output is less than +/- 350 pS, the part acts as a zero delay buffer. The ICS9112-16 es in an eight pin 150 mil SOIC or...