ICS91305 Overview
The ICS91305 is a high performance, low skew, low jitter clock driver. It uses a phase lock loop (PLL) technology to align, in both phase and frequency, the REF input with the CLKOUT signal. It is designed to distribute high speed clocks in munication systems operating at speeds from 10 to 133 MHz.
ICS91305 Key Features
- Zero input
- output delay Frequency range 10
- 133 MHz (3.3V) 5V tolerant input REF High loop filter bandwidth ideal for Spread Spectrum
