ICS9250-09 Datasheet PDF - Integrated Circuit Systems Frequency Timing Generator Specs

ICS9250-09 - Frequency Timing Generator

Datasheet Summary

Description

The ICS9250-09 is a main clock synthesizer chip for Pentium II based systems using Rambus Interface DRAMs.

This chip provides all the clocks required for such a system when used with a Direct Rambus Clock Generator(DRCG) chip such as the ICS9211-01.

Features

Generates the following system clocks: - 4 CPU clocks ( 2.5V, 100/133MHz) - 8 PCI clocks, including 1 free-running (3.3V, 33MHz) - 2 CPU/2 clocks (2.5V, 50/66MHz) - 3 IOAPIC clocks (2.5V, 16.67MHz) - 4 Fixed frequency 66MHz clocks(3.3V, 66MHz) - 2 REF clocks(3.3V, 14.318MHz) - 1 USB clock (3.3V, 48MHz) Efficient power management through PD#, CPU_STOP# and PCI_STOP#. 0.5% typical down spread modulation on CPU, PCI, IOAPIC, 3V66 and CPU/2 output clocks. Uses external 14.318MHz crystal. K.

Datasheet Details

Part number	ICS9250-09
Manufacturer	Integrated Circuit Systems
File Size	336.03 KB
Description	Frequency Timing Generator
Datasheet	ICS9250-09 Datasheet
Additional preview pages of the ICS9250-09 datasheet.

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Full PDF Text Transcription

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Integrated Circuit Systems, Inc. ICS9250-09 Frequency Timing Generator for PENTIUM II Systems General Description The ICS9250-09 is a main clock synthesizer chip for Pentium II based systems using Rambus Interface DRAMs. This chip provides all the clocks required for such a system when used with a Direct Rambus Clock Generator(DRCG) chip such as the ICS9211-01. Spread Spectrum may be enabled by driving the SPREAD# pin active. Spread spectrum typically reduces system EMI by 8dB to 10dB. This simplifies EMI qualification without resorting to board design iterations or costly shielding. The ICS9250-09 employs a proprietary closed loop design, which tightly controls the percentage of spreading over process and temperature variations. The CPU/2 clocks are inputs to the DRCG.

Published: Dec 11, 2005 |