ICS93705 Description
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ICS93705 Key Features
- Low skew, low jitter PLL clock driver
- I2C for functional and output control
- Feedback pins for input to output synchronization
- Spread Spectrum tolerant inputs
- 3.3V tolerant CLK_INT input Switching Characteristics
- PEAK jitter (66MHz): <120ps
- PEAK jitter (>100MHz): <75ps
- CYCLE jitter (66MHz):<120ps
- CYCLE jitter (>100MHz):<65ps
- OUTPUT