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ICS93705 Datasheet DDR Phase Lock Loop Zero Delay Clock Buffer

Manufacturer: Renesas

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Datasheet Details

Part number	ICS93705
Manufacturer	Renesas
File Size	306.81 KB
Description	DDR Phase Lock Loop Zero Delay Clock Buffer
Datasheet	ICS93705 Datasheet

General Description

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Overview

ICS9370 5 DDR Phase Lock Loop Zero Delay Clock Buffer Recommended Application: DDR Zero Delay Clock.

Key Features

Low skew, low jitter PLL clock driver.
I2C for functional and output control.
Feedback pins for input to output synchronization.
Spread Spectrum tolerant inputs.
3.3V tolerant CLK_INT input Switching Characteristics:.
PEAK - PEAK jitter (66MHz): 100MHz):.

📁 Similar Datasheet

Brand Logo	Part Number	Description	Manufacturer
	ICS93705	DDR Phase Lock Loop Zero Delay Clock Buffer	Integrated Circuit Systems

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