M2006-12A Description
The M2006-12A is a VCSO (Voltage Controlled SAW Oscillator) based clock generator PLL designed for clock frequency translation and jitter attenuation. Clock multiplication ratios (including forward and inverse FEC) are pin-selected from pre-programming look-up tables. Includes Hitless Switching and Phase Build-out to enable SONET (GR-253) / SDH (G.813) MTIE and TDEV pliance during reference clock reselection.
M2006-12A Key Features
- Reduced intrinsic output jitter and improved power supply noise rejection pared to M2006-12
- Similar to the M2006-02A
- and pin-patible
- but adds Hitless Switching and Phase Build-out functions
- Includes APC pin for Phase Build-out function (for absorption of the input phase change)
- Pin-selectable PLL divider ratios support forward and inverse FEC ratio translation
- Input reference and VCSO frequencies up to 700MHz (Specify VCSO frequency at time of order)
- Low phase jitter of 0.25 ps rms typical (12kHz to 20MHz or 50kHz to 80MHz)
- mercial and Industrial temperature grades
- Single 3.3V power supply