IDT72V3650 Datasheet PDF

Integrated Device Tech IDT72V3650

The IDT72V3640/72V3650/72V3660/72V3670/72V3680/72V3690/ 72V36100/72V36110 are exceptionally deep, high speed, CMOS First-InFirst-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. These FIFOs offer several key user benefits: • Flexible x36/x18/x9 Bus-Matching on both read and write ports • The period required by the retransmit operation is fixed and short. Each FIFO has a data input port (Dn) and a data output port (Qn), both of which can assume either a 36-bit, 18-bit or a 9-bit width as determined by the state of external control pins Input Width (IW), Output Width (OW), and BusMatching (BM) pin during the Master Reset cycle.