IDT72V3650 - 3.3V HIGH-DENSITY 36-BIT FIFO

Product Overview

Renesas

Datasheet Details

Part number	IDT72V3650
Manufacturer	Renesas
File Size	488.26 KB
Description	3.3V HIGH-DENSITY 36-BIT FIFO
Datasheet	IDT72V3650 Datasheet
Note	This datasheet PDF includes multiple part numbers: IDT72V3650, IDT72V3640. Please refer to the document for exact specifications by model.
Additional preview pages of the IDT72V3650 datasheet.

Product details

Description

The IDT72V3640/72V3650/72V3660/72V3670/72V3680/72V3690 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x36/x18/x9 data flow. Flexible x36/x18/x9 Bus-Matching on both read and write ports The period required by the retransmit operation is fixed and short. Thefirstworddatalatencyperiod,fromthetimethefirstwordiswrittentoan empty FIF

Features

Choose among the following memory organizations:Commercial IDT72V3640 ⎯ 1,024 x 36 IDT72V3650 ⎯ 2,048 x 36 IDT72V3660 ⎯ 4,096 x 36 IDT72V3670 ⎯ 8,192 x 36 IDT72V3680 ⎯ 16,384 x 36 IDT72V3690 ⎯ 32,768 x 36.
Up to 166 MHz Operation of the Clocks.
User selectable Asynchronous read and/or write ports (PBGA Only).
User selectable input and output port bus-sizing - x36 in to x36 out - x36 in to x18 out - x36 in to x9 out - x18 in to x36 out - x9 in to x36 out.

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Other Datasheets by Renesas

IDT72V36110 - 3.3 VOLT HIGH-DENSITY SUPERSYNC FIFO
IDT72V3623 - CMOS SyncFIFO
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Published: Sep 9, 2023 |