ICSLV810 Datasheet PDF (BUFFER - CLOCK DRIVER) | Download Integrated Device Technolog ICSLV810

ICSLV810 - BUFFER - CLOCK DRIVER

Description

The ICSLV810 is a low skew 1.5 V to 2.5 V, 1:10 fanout buffer.

This device is specifically designed for data communications clock management.

The large fanout from a single input line reduces loading on the input clock.

Features

Packaged in 20-pin QSOP/SSOP.
Split 1:10 fanout Buffer.
Maximum skew between outputs of different packages.
0.75 ns Max propagation delay of 3.8 ns Operating voltage of 1.5 V to 2.5 V on Bank A Operating voltage of 1.5 V to 2.5 V on Banks B and C Advanced, low power, CMOS process Industrial temperature range -40° C to +85° C 3.3 V tolerant input when VDDA=2.5 V Pb (lead) free packaging Block Diagram.

Datasheet Details

Part number	ICSLV810
Manufacturer	Integrated Device Technolog
File Size	330.79 KB
Description	BUFFER - CLOCK DRIVER
Datasheet	ICSLV810 Datasheet
Additional preview pages of the ICSLV810 datasheet.

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Full PDF Text Transcription

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DATASHEET BUFFER/CLOCK DRIVER Description The ICSLV810 is a low skew 1.5 V to 2.5 V, 1:10 fanout buffer. This device is specifically designed for data communications clock management. The large fanout from a single input line reduces loading on the input clock. The TTL level outputs reduce noise levels on the part. Typical applications are clock and signal distribution. ICSLV810 Features • Packaged in 20-pin QSOP/SSOP • Split 1:10 fanout Buffer • Maximum skew between outputs of different packages • • • • • • • 0.75 ns Max propagation delay of 3.8 ns Operating voltage of 1.5 V to 2.5 V on Bank A Operating voltage of 1.5 V to 2.5 V on Banks B and C Advanced, low power, CMOS process Industrial temperature range -40° C to +85° C 3.3 V tolerant input when VDDA=2.

Published: Jun 7, 2014 |